1. Field of the Invention
The present invention relates to a semiconductor device, and particularly to a semiconductor device including a channel region formed of a part of a semiconductor substrate and an electrode.
2. Description of the Background Art
As semiconductor devices, there are power semiconductor chips such as an IGBT (Insulated Gate Bipolar Transistor) and a power MOSFET (Metal Oxide Semiconductor Field-Effect Transistor). Gates of these semiconductor chips primarily have a plane gate structure or a trench gate structure.
In the prior art, the gate of the trench gate structure is made of e.g., polycrystalline silicon. In recent years, such a method has been proposed that uses metal of a high melting point for lowering a resistivity of the trench gate. According to, e.g., Japanese Patent Laying-Open No. 2001-044435, a polycrystalline silicon layer, i.e., a buffer layer as well as high-melting point metal are formed or arranged in a trench of the trench gate structure.
A resistance element called a gate resistance may be connected to the gate. Although the gate resistance is arranged externally with respect to the semiconductor chip in a conventional structure, it has been proposed in recent years to arrange the gate resistance inside the semiconductor chip.
For example, Japanese Patent Laying-Open No. 2002-083964 has proposed a gate resistance (internal gate resistance) arranged inside a semiconductor chip. According to this publication, the internal gate resistance made of, e.g., polycrystalline silicon stabilizes a switching operation of semiconductor elements connected in parallel.
For example, Japanese Patent Laying-Open No. 2003-197914 has disclosed a semiconductor device in which an internal gate resistance made of, e.g., polycrystalline silicon is arranged under a gate pad, i.e., an exposed portion of a gate external-connection electrode with an interlayer insulating film therebetween. According to this publication, this structure provides a semiconductor device that does not reduce an area of an active region of a semiconductor substrate, has an internal gate resistance of a large area and can suppress a current density of a transitional pulse current.
The above semiconductor device having the external gate resistance suffers from a problem of increase in number of parts. Also, a potential of connection between the gate resistance and the semiconductor chip is liable to change due to external noises, and this potential change directly affects the gate in the semiconductor chip without mediation of a gate resistance. This results in a problem in that the semiconductor device is liable to malfunction or oscillate.
For example, when hundreds to tens of thousands of gates in an IGBT may be supplied with currents, a large current flows through a gate resistance. In this case, a current path of the gate resistance must have a large sectional area for ensuring reliability. In the semiconductor device of Japanese Patent Laying-Open No. 2002-083964 described above, it is necessary to increase a width or a thickness of the internal gate resistance. However, increase in thickness results in problems that a long time is required for depositing a film forming the internal gate resistance, and that processing or working of the film thus deposited is difficult. Also, increase in width results in a problem that areas of the internal gate resistance and therefore the semiconductor chip increase.
According to the internal gate resistance of Japanese Patent Laying-Open No. 2003-197914 described above, an area of the semiconductor chip can be reduced because the gate pad and the internal gate resistance overlap each other, but the area can be reduced only by an area of the gate pad at the most.